4G/5G Ru/ Mmu FPGA Design And Implementation Engineer

1. Summary:

This job is to design and implement FPGA function blocks in RU. It includes design and implementation of function blocks as below.

• Interface: CPRI, eCPRI, ORAN and JESD204B/C.

• Low PHY: DLFE(IFFT), MU weight generation, ULFE(FFT), RAFE, MRC, Beamforming and antenna calibration.

• DFE: DUC, DDC, CFR, DPD and PIM.

• Etc: RU/MMU control.

2. Responsibilities

• FPGA Device resource estimation and power estimation.

• Specification definition and documentation.

• Digital logic design for control/interface and digital signal processing.

• Handling for RTL IP or Library.

• RTL design and simulation, synthesis, timing analysis and Place & Route.

• FPGA function verification and debugging.

• Degree: Bachelor’s degree or higher in wireless communication.

(Over Master degree preferred)

• Minimum 2 years of experience in developing FPGA for wireless communication.

• Minimum 2 years of experience in RTL (Verilog, VHDL, System Verilog).

• Minimum 2 years of experience in simulator and Place & Route tool such as Mentor, Synopsys, Cadence, Vivado and Quartus.

• Experience in developing RU/MMU FPGA function blocks as below:

- Interface: CPRI, eCPRI, ORAN and JESD204B/C.

- Low PHY: DLFE(IFFT), MU weight generation, ULFE(FFT), RAFE, MRC, Beamforming and antenna calibration.

- DFE: DUC, DDC, CFR, DPD and PIM.

• Experience in Matlab and C-code.

• Knowledge in LTE/NR air specification.

• In-depth knowledge in FPGA device structure.