Các Phúc Lợi Dành Cho Bạn
Mô Tả Công Việc
• Functional and timing verification of FPGA design using simulation
• In-system verification of FPGA design on the system
• Writing verification test benches and automation of test cases
• Regression testing of FPGAs (simulation and in-system)
• Verification of serdes, BER testing and eye diagram verification
Yêu Cầu Công Việc
• Good understanding of FPGA architecture of leading vendors is must
• Experience in Static timing analysis, timing constrains, clock-domain crossing is must
• Hands-on experience with EDA tools on timing closure is must
• Experience in verification/simulation tools is must
• Knowledge of scripting languages Perl, Python, TCL is preferred
• Knowledge of version control systems like svn/cvs is preferred
• Experience with FPGA test automation / regression is preferred
• Good documentation and communication skills
• Ability to guide /mentor junior members of team
• Understanding of OTN/Ethernet and 5G communication technologies are a plus