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13th month salary, Bonus
Health Insurance for employee and dependents
14 days/year
Mô Tả Công Việc
As an FC Timing Engineer, you will be developing and executing full-chip timing analysis and timing modeling methodologies for Intel's Programmable Solutions Group's next generation product lines in the world's most advanced process technologies. This will be a fast-paced dynamic environment where you will be part of a high performance design team working toward next generation FPGA products.
- You will work in a hands-on capacity performing full chip timing analysis.
- You will utilize your extensive architecture and design experience and interpersonal skills to efficiently solve technical issues, drive continuous improvement, negotiate and clearly communicate technical tradeoffs with a diverse cross-functional and multi-site team.
- You must be able to work to aggressive schedules as part of a team and also independently.
- Your tasks will include but not limited to: Design and Architecture understanding, Interaction with frontend and backend teams, Clocking, Constraints development, understanding extraction issues, design margins, timing signoff and quality checks.
- You will also be part of debug and troubleshooting for a wide variety of tasks up to and including difficult, critical design issues and proactive intervention.
Xem toàn bộ Mô Tả Công Việc
- You will work in a hands-on capacity performing full chip timing analysis.
- You will utilize your extensive architecture and design experience and interpersonal skills to efficiently solve technical issues, drive continuous improvement, negotiate and clearly communicate technical tradeoffs with a diverse cross-functional and multi-site team.
- You must be able to work to aggressive schedules as part of a team and also independently.
- Your tasks will include but not limited to: Design and Architecture understanding, Interaction with frontend and backend teams, Clocking, Constraints development, understanding extraction issues, design margins, timing signoff and quality checks.
- You will also be part of debug and troubleshooting for a wide variety of tasks up to and including difficult, critical design issues and proactive intervention.
Yêu Cầu Công Việc
The successful candidate's minimum qualifications will include the following:
- B.Sc./MS in Electrical Engineering, Computer Science, or equivalent with a minimum of 5+ years of experience in large SoC development including the completion of several complex multi voltage domain SoC projects at advanced process nodes (32nm and below).
- You are regarded as a go-to technical STA expert for these projects.
- Must be familiar with silicon modeling concepts such as AOCV
- Your experience should also include in depth knowledge of timing modeling and library QA.
- Must demonstrate good understanding of standard ASIC timing formats such as Liberty, SPEF, Verilog, and SDC.
- Experience correlating STA results with Spice.
- Must be familiar with common modes of operation, including functional and DFT, for use in constraint review and management.
- Must be knowledgeable in script writing for design automation in one or more of the following languages: perl, tcl, and python.
- Outstanding communication, teamwork, negotiation and analytical skills are an essential part of this role.
- Clear demonstration of technical leadership and successful cross-functional interaction across teams and geographies.
- B.Sc./MS in Electrical Engineering, Computer Science, or equivalent with a minimum of 5+ years of experience in large SoC development including the completion of several complex multi voltage domain SoC projects at advanced process nodes (32nm and below).
- You are regarded as a go-to technical STA expert for these projects.
- Must be familiar with silicon modeling concepts such as AOCV
- Your experience should also include in depth knowledge of timing modeling and library QA.
- Must demonstrate good understanding of standard ASIC timing formats such as Liberty, SPEF, Verilog, and SDC.
- Experience correlating STA results with Spice.
- Must be familiar with common modes of operation, including functional and DFT, for use in constraint review and management.
- Must be knowledgeable in script writing for design automation in one or more of the following languages: perl, tcl, and python.
- Outstanding communication, teamwork, negotiation and analytical skills are an essential part of this role.
- Clear demonstration of technical leadership and successful cross-functional interaction across teams and geographies.
Địa Điểm Làm Việc
Lot I2, Road D1, Saigon Hi-Tech Park, District 9, Ho Chi Minh City
