Senior Layout Engineer

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What We Can Offer

leveling incentive
healthcare insurance: oneself + spouse + children
16 annual leave

Job Description

Job Descriptions

• Schedules and manages work flow, tasks, design data/documentations
• Normally receives little instruction on day-to-day work, general instructions on new assignments
• Demonstrates good judgment in selecting methods and techniques for obtaining solutions
• Works on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees
• Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematics
• Understands and applies Analog Layout techniques to ensure design meet performance with minimum area and good yield
• Participates in building and enhancing layout flow for faster, higher quality design process
• Does layout verification for DRC/LVS/ERC/ANT/ESD/DFM
• Does PERC verification for ESD/LUP checks
• Completes all design quality checks and data quality checks
• Works with Place and Route engineer to integrate analog layouts into top level
• Does design reviews across global team
• May collaborate in package design (interposer design, RDL design)
• Works closely with design team in Viet Nam, USA and Italy to ensure the success of the whole product
• May join research programs to implement new ideas for future products and flows
• May lead a layout team to complete a full design block
• May mentor junior layout engineers or interns

Opportunities

SNPS is the world number one IP provider. Work with many experts from around the world and talented highly motivated Viet Nam engineering team
• Professional, innovative, fair and fun working environment. Strong culture company.
• Competitive salary and benefit. Strong support from company for health: Insurance, Sport clubs: Football, Ping-Pong, Badminton, Yoga, Zumba …
• Strong support from company for team building, social activities: Team trip, Family Day…
• Opportunity to get in touch with the complete design flow of a real complicated Analog Mixed Signal Design from specification to silicon.
• Chance to work with bleeding edge technologies like: 2.5D/3D IC, Tbps Die to Die interface that enable Data Center, AI/ML, 5G applications.
• Clear career path of self-development to either Technical Expert or Design Leader/Manager
• Travel to USA, Europe and Asia for training or on-site support
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Job Requirements

• BS in Electronics Engineering, Electromechanics, Telecommunications
• 4+ years of experience in custom layout
• Familiar with Layout entry tools: Cadence, Synopsys
• Familiar with Layout verification tools: Mentor Calibre, Synopsys ICV
• Understand basic semiconductor fabrication processes
• Understand MOSFET fundamentals
• Understand layout techniques for high speed, matching, ESD, Latchup, Antenna, EMIR
• Experienced with writing layout review presentations and layout verification reports
• Good English communication
• Good team player
• Self motivated

Job Locations

eTown 2, 9th Fl., 364 Cong Hoa Str., Tan Binh Dist., HCMC, VN

Wherever Smart Everything Is, You'll Find Synopsys
Synopsys technology is at the heart of innovations that are changing the way people work and play. Self-driving cars. Machines that learn. Lightning-fast communication across billions of devices in the datasphere. These breakthroughs are ushering in the era of Smart Everything―where devices are getting smarter, everything is connected, and everything must be secure.
Powering this new era of digital innovation are high-performance silicon chips and exponentially growing amounts of software content. Synopsys is at the forefront of Smart Everything with the world’s most advanced technologies for chip design, verification, IP integration, and software security and quality testing. We help our customers innovate from silicon to software so they can bring Smart Everything to life.

website: www.synopsys.com/

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10,000-19,999 staffs
Tam Nguyen
TUYỂN SINH THẠC SỸ TÀI CHÍNH - ĐẠI HỌC JEAN MOULIN LYON 3 (CH Pháp)

TUYỂN SINH THẠC SỸ TÀI CHÍNH - ĐẠI HỌC JEAN MOULIN LYON 3 (CH Pháp)

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